IA-64 Part II
is widely applicable. According to a study based on popular software benchmarks
predication can, on average, reduce the number of branches by more than 50 percent and
reduce mispredicts by as much as 40 percent. In contrast to some existing architectures,
the IA-64 architecture allows all instructions to be predicated.
In the above figure, the memory load is speculatively scheduled above the branch in the instruction stream so as to start the memory access as early as possible. If an exception occurs, this event is stored and the check.s instruction causes the exception to be processed. The elevation of the load allows more time to account for memory latency, without stalling the processor pipeline.
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