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IA-64 Part II

Predication is widely applicable. According to a study based on popular software benchmarks predication can, on average, reduce the number of branches by more than 50 percent and reduce mispredicts by as much as 40 percent. In contrast to some existing architectures, the IA-64 architecture allows all instructions to be predicated.

Overcoming memory latency is another major performance challenge for today's processor architectures. Because memory speed is significantly slower than processor speed, the processor must attempt to load data from memory as early as possible to insure the data is available when needed. Traditional architectures allow compilers and the processor to schedule loads before data is needed, but branches act as barriers to this load hoisting.

IA-64 architecture employs a technique known as speculation to initiate loads from memory earlier in the instruction stream even before a branch. Because loads can generate exceptions, a mechanism to ensure that exceptions are properly handled is needed to support speculation that hoists loads before branches.

In the above figure, the memory load is speculatively scheduled above the branch in the instruction stream so as to start the memory access as early as possible. If an exception occurs, this event is stored and the check.s instruction causes the exception to be processed. The elevation of the load allows more time to account for memory latency, without stalling the processor pipeline.

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